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System Navigator for Nios II
System Navigator Products for Nios II Embedded Processors
 Altera has partnered with FS2 to provide a world-class debugging solution to developers working with the Nios II® embedded processor.
Nios II processor cores feature a configuration option to include FS2's on-chip instrumentation (OCI®) debug logic in the chip. The OCI logic provides powerful trace, triggering, and performance analysis features for faster and easier system and software debug and testing.
The System Navigator is designed to support the special features and integrated peripherals of the Nios II cores.
The OCI extensions include advanced triggers, performance analysis, and on-chip trace features beyond the basics provided by the USB Blaster. This allows FS2 to provide a powerful debug tool with advanced features at a competitive price. See the Product/Feature table below, to determine the correct product for your application or contact FS2 for assistance.
| Product / Feature Table |
Key Features |
USB Blaster
with Nios II
Kit |
Software Feature
Upgrade |
SNAV-NIOS II-ETH
Probe |
| Execution Breakpoints |
2 |
4 |
4 |
| Data/Cycle Breakpoints (Note 1) |
2 |
4 |
4 |
| Trace Depth (Note 2) |
16 frames |
Unlimited |
Unlimited |
| Data/Bus Cycle Trace |
No |
Yes |
Yes |
| Performance Analysis |
No |
Yes |
Yes |
| Host connection |
USB Blaster |
USB Blaster |
USB 2.0
10/100 Ethernet |
| Target Connector |
JTAG |
JTAG |
JTAG |
Notes:
(1) Set trigger on address/address range, data values, with masking support, and/or on cycle types load, store, any
(2) Limited only by RAM resources on-chip
System Navigator
System Navigator supports on-chip trace capture. It has a USB 2.0 and 10/100 Ethernet interface to the PC host. It uses a 10-pin JTAG debug connector for the target interface. It runs on Windows® 2000/XP PC.
Source-Level Debug Options
For source-level debug, the FS2 System Analyzer is supported by the Eclipse-based Nios II debugger
included in the Altera Development Kit, the Mentor Graphics/ATI code|lab®
debugger, or Viosoft Arriba debugger. The Accelerated Technology® code|lab
debugger from Mentor Graphics provides rich source-level debugging features in a graphical Windows®
interface. Code|lab Debug options are available as a package with the FS2 debugger. Contact your Mentor Graphics office
or contact FS2 for more information.
Key Features
• Supports Altera Nios II core with FS2 On-Chip Instrumentation (OCI) debug extensions
• On-chip trace supported
• Real-time execution trace
• Data and bus cycle trace
• Trace can be gated on/off by on-chip triggers
• Configurable trace options: instructions only, data cycles only, or both
• Max trace depth limited by Nios II processor configuration
• Unlimited software breakpoints
• Up to 8 hardware breakpoints (4 instruction/4 data)
• Go, halt processor run control
• Single step by assembly or C source line
• Read-write all CPU registers and memory
• Flash programming support
• Debug of multiple Nios II cores supported
• Low-level access to JTAG functions for verification
• Single line assembler and disassembler
• Command-line interface with Tcl/tk scripting language standard
• Source-level debug support from Eclipse-based Altera debugger or Mentor Graphics Edge debugger
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FS2 is a division of MIPS Technologies, Inc. © 2007 MIPS Technologies, Inc.
FS2, the FS2 First Silicon Solutions logo, FS2 Navigator, Bus Navigator, Logic Navigator, System Navigator, Clam, FPGAView, HyperDebug, HyperJTAG, MED,
and OCI are trademarks or registered trademarks of MIPS Technologies, Inc. in the United States and other countries.
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