FS2® ANNOUNCES IMMEDIATE
AVAILABILITY OF NIOS II DEBUG TOOLS

Real-time trace, sophisticated triggers, and performance
analysis tools available for immediate download

PORTLAND, OREGON, May 19, 2004 - First Silicon Solutions (FS2) today announced three new development tool solutions for the Altera® Nios® II processor. The new tool offerings include a $695 download from the FS2 website to enable the Altera USB Blaster with sophisticated real-time trace capture, enhanced triggers and performance analysis tools. FS2 also released a new In-Target Systems Analyzer for the Nios II that includes an ultra-deep off-chip trace buffer. Complete product offerings and options are described at the FS2 web page: http://www.fs2.com/isa-nios.html.

The system is built around FS2’s OCI® (On-chip Instrumentation) debug block technology, proven in version (3.0) of the previous generation Nios core.  The system includes many of the basic features frequently used for software and hardware debug included in the Altera Nios II software release at no charge. Optional advanced features such as deeper trace, additional hardware triggers, and performance analysis can be purchased separately for state-of-the-art tools at cost-effective price points.

New Performance Analysis Tools
FS2 System Analyzer Options available for the Nios II include a new performance analysis mode that greatly facilitates user optimization of hardware and software for the FPGA environment. Typical performance measurements include cache hit/misses, measuring I/O activity such as interrupt frequency from each device, packet writes, UART traffic, DMA starts, or even a unique value written to a register. Other measurements include basic timing duration of repetitive algorithms along with the number of instructions executed.

Price and Availability
A basic version of the System Analyzer debug tool is included at no charge in the Nios II Development Kits. The basic system includes complete run control, hardware breakpoints, flash programming and on-chip trace features—a complete solution for many entry users.

Users can purchase a software upgrade for $695 that includes the performance analysis features, deeper on-chip trace support including, bus cycle information, and additional hardware triggers. For designs with limited on-chip trace resources, FS2 offers the ISA-Nios/T, which includes a 128K deep off-chip trace buffer. Since the ISA-Nios/T stores trace off-chip the number of on-chip gates required for the On-Chip Instrumentation is greatly reduced.

“With the dramatic increase in performance, the Nios II family of processors address a wider range of embedded applications, creating the need for a robust set of software development tools”, said Bob Garrett, marketing manager for Altera’s Nios processor IP. “To ensure that we met the software designer’s development tool needs we partnered with FS2 for best-in-class tools that are tightly integrated with Altera's Nios II IDE."

“The Nios II processor’s performance makes it a viable candidate for any embedded design requiring 32-bit performance. The sophistication of the development tools will most certainly make it even more attractive” said Rick Leatherman, president of First Silicon Solutions. “FS2 has worked closely with Altera to provide a debug environment tightly integrated into the Nios II Integrated Development Environment (IDE).  With features like real-time trace, sophisticated multi-level triggering and the addition of performance analysis, the Nios II tools meet or exceed the capability of tools available for any synthesizable 32-bit processor core at price/performance levels unmatched in the industry.”

About the FS2 System Analyzer for Nios II
The FS2 System Analyzer consists of FS2 OCI (On-chip Instrumentation) provided in the Quartus II development software, a hardware probe for communications with the Nios II embedded processor, and Windows-based host software. The system can be used with the Mentor Graphics Accelerated Technology code|lab Debug or with the Altera Nios II development IDE software debugger. The OCI block offers configurable parameters for triggers and trace depth allowing the design engineer to make their own determination as to how many gates they want to allocate to debug.

About First Silicon Solutions
Founded in 1998, First Silicon Solutions (FS2) specializes in hardware verification and debug technologies including OCI® (On-Chip Instrumentation) custom silicon IP, development tools, and design services for programming, testing and debug of embedded systems in FPGA, SOC, SOPC, ASSP and ASIC designs. FS2 provides full system solutions with IP blocks, hardware, and software tools used at several stages in the development cycle from system design and verification to software development and debug. FS2 products enable silicon vendors and their customers to take their designs from "first silicon" to production faster, with a better understanding of the design performance and overall operation - for faster time to market and higher quality products. Additional information is available at www.fs2.com.

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