Sunnyvale, California – January 6, 2003 – QuickLogic Corporation (Nasdaq: QUIK), the pioneer of Embedded Standard Products (ESPs), announced today that its QuickMIPS programmable system-on-chip (SoC) has been certified for the Accelerated Technology® code|lab™ Embedded Developer Suite and Nucleus™ Real-Time Operating System (RTOS). Accelerated Technology (AT) is the Embedded Systems Division of Mentor Graphics.

This solution allows system developers to debug their hardware and software designs in a single, integrated development environment, reducing development time and cost. A Board Support Package (BSP) is available which includes a system initialization code, interrupt handling code and drivers for on-chip devices (i.e., UARTs, Ethernet MACs) as well as on-board devices. Running the Nucleus RTOS on QuickMIPS provides a variety of software solutions for networking, data storage and graphics through optional AT packages such as Nucleus NET, Nucleus FILE and Nucleus GRAFIX.

“QuickLogic’s partnership with AT provides system designers with an integrated solution for co-development of software and hardware æ so more of the developers time can be spent differentiating designs, without compromising time-to-market and cost reduction,” said Judd Heape, system applications manager for the QuickMIPS product line.

" When we first envisioned our code|lab Embedded Developer Suite, platforms such as the QuickMIPS programmable SoC were at the forefront of our minds," said Robert Day, director of marketing for the Embedded Systems Division of Mentor Graphics. "The combination of the FS2 probe integrated with code|lab and Nucleus RTOS products and QuickMIPS will bring significant cost and time-to-market benefits to QuickMIPS system users."

QuickMIPS Design Advantages
The complete QuickMIPS development solution includes the SDK, software drivers for real-time operating systems such as Accelerated Technology’s Nucleus RTOS, and a QuickMIPS system model. It also offers the first On-Chip Instrumentation (OCI‘) solution from First Silicon Solutions (FS2) that enables integrated debugging of the programmable logic fabric and the CPU. In addition to the run control and debugging features that are accessible through the MIPS EJTAG port, the device features the FS2 CLAM“ (Configurable Logic Analyzer Module) which allows the user to trace and trigger on up-to 128 specified internal nodes (32 at a time) within the programmable logic fabric. Cross triggering between the CLAM system and MIPS CPUs enables instructions to be stopped and traced back to the fabric, thereby speeding software-hardware codesign and co-verification.

The system model, SDK and the programmable logic on the QuickMIPS device enables designers to make software and hardware tradeoffs early in the design cycle, reducing design time and cost. Boot code in Flash memory can be downloaded through the USB port on the SDK. Also, the Ethernet ports on the SDK allow fast downloading of code for application development.

About QuickMIPS
QuickMIPS, first introduced in 2000, combines a secure programmable System-on-Chip with a complete design environment. The QuickMIPS architecture contains an embedded MIPS 4Kc 32-bit processor core, 2x 10/100 Ethernet MACs, UARTs, PCI Controller, 16K Bytes SRAM and other peripherals with 500K gates of programmable FPGA fabric for hardware customization and acceleration. QuickMIPS incorporates the AMBA bus for high-speed interconnection of peripherals and logic. Debugging is easily accomplished using the on-board EJTAG bus and associated CLAM debugging tools. QuickMIPS is both hardware and software programmable, and is based on QuickLogic’s ultra-secure, patented Vialink“ technology.

Availability
The BSP for QuickMIPS is available now from Accelerated Technology. An evaluation CD with the code|lab tool and the Nucleus RTOS for the QuickMIPS will be available in March 2003 and is free of charge with the purchase of a QuickMIPS System Development Kit (SDK). Licensed copies of code|lab and the Nucleus RTOS are priced separately and are available from AT.

Editors: Artwork of the QuickMIPS SDK is available at www.quicklogic.com/press

QuickLogic Embedded Standard Product (ESP) Advantages
QuickLogic’s ESP families offer standard product time-to-market and economics coupled with user customizable logic – on the same piece of silicon. The performance, power and cost advantages provided by these innovative devices and QuickLogic’s ViaLink“ based logic architecture, make these integrated circuits ideal for high-speed, low-power applications such as data and telecom systems, instrumentation and test systems. QuickLogic ESP families include QuickMIPS‘, QuickPCI‘, QuickRAM‘, QuickDSP‘, QuickFC‘ and QuickSD‘.

About Accelerated Technology
Accelerated Technology, the Embedded Systems Division of Mentor Graphics Corporation, is located in Mobile, Alabama with sales offices and distributors worldwide. By providing embedded systems developers with a focus on service, well-documented source code and industry leading non-royalty based Real-Time Operating Systems (RTOS) software, AT's RTOS software shortens time-to-market and provides a complete solution for engineers. For more information, please visit www.acceleratedtechnology.com or email us at info@acceleratedtechnology.com.

About FS2
First Silicon Solutions provides IP and tools for testing and debugging of SoC hardware and software. FS2 products help silicon vendors and their customers develop and more effectively market their products, reducing their development cycles, and allowing them to focus on delivering all the potential of the system on silicon. CLAM and OCI are trademarks of FS2. For more information on FS2, call Chuck Swartley at 503/292-6730 or visit the web site http://www.fs2.com

About QuickLogic
QuickLogic Corporation (Nasdaq: QUIK) began developing the Embedded Standard Product (ESP) architecture in 1998, an innovation that delivers the guaranteed performance and lower cost of standard semiconductor products and the flexibility and time-to-market benefits of programmable logic. QuickLogic's ViaLink metal-to-metal interconnect technology offers high performance and is the foundation of the company's ESP families as well as our core FPGA products. Founded in 1988, the company is located at 1277 Orleans Drive, Sunnyvale, CA 94089-1138. For more information please visit the QuickLogic web site at www.quicklogic.com

Safe Harbor Statement Under The Private Securities Litigation Reform Act of 1995
This news release contains forward-looking statements based on current expectations that involve risks and uncertainties including statements regarding pricing and availability of QuickMIPS devices and related products. QuickLogic’s actual results may differ from the results described in the forward-looking statements. Factors that could cause actual results to differ include, but are not limited to, the availability and performance of the products, market acceptance of the products, the impact of competitive products and general conditions in the semiconductor industry. These and other risk factors are detailed in QuickLogic’s periodic reports and registration statements filed with the Securities and Exchange Commission.

( Download the PDF )

QuickLogic Contact:
Jan Houts
Director, Corp. Communications
(408) 990-4256
houts@quicklogic.com

QuickLogic Contact:
Judd Heape
System Application Manager
(972) 818-3418
judd@quicklogic.com

QuickLogic and the QuickLogic logo are registered trademarks and QuickFC, QuickPCI, QuickDSP, QuickRAM and QuickSD are trademarks of QuickLogic Corporation. All other brands or trademarks are the property of their respective holders and should be treated as such